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General Information
Editor-in-chief

 
Faculty of Science, University of Brunei Darussalam, Brunei Darussalam   
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IJIEE 2015 Vol.5(1): 68-73 ISSN: 2010-3719
DOI: 10.7763/IJIEE.2015.V5.504

Verification of Embedded System Designs through Hardware-Software Co-Simulation

José Cláudio V. S. Júnior, Alisson V. Brito, and Tiago P. Nascimento
Abstract— This work proposes an environment for real- time testing of heterogeneous embedded systems through cosimulation. The verification occurs on real-time between the system software and hardware platform using the High Level Architecture (HLA) as a middleware between the hardware device and the simulated model. The novelty of this approach is not only providing support for simulations, but also allowing the synchronous integration with any physical hardware devices. In this paper we use the Ptolemy framework as a simulation platform. The integration of HLA with Ptolemy and the hardware models open a vast set of applications, like the test of many devices at the same time, running the same, or different applications or modules, the usage of Ptolemy for real-time control of embedded systems and the distributed execution of different embedded devices for performance improvement or collaborative execution. A case study is presented to prove the concept, showing the successful integration between the Ptolemy framework with an implementation using Atmel and ARM microcontrollers.

Index Terms— Functional hardware verification, cosimulation, ptolemy, high level architecture, embedded systems.

José Cláudio V. S. Júnior, Alisson V. Brito, and Tiago P. Nascimento are with Federal University of Paraiba – Center of Informatics, João Pessoa–PB–Brasil, Brazil (e-mail: cl4udio@gmail.com, alisson@ci.ufpb.br, tiagopn@ci.ufpb.br).

[PDF]

Cite: José Cláudio V. S. Júnior, Alisson V. Brito, and Tiago P. Nascimento, " Verification of Embedded System Designs through Hardware-Software Co-Simulation," International Journal of Information and Electronics Engineering vol. 5, no. 1, pp. 68-73, 2015.

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