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General Information
    • ISSN: 2010-3719 (Online)
    • Abbreviated Title: Int. J. Inf. Electron. Eng.
    • Frequency: Quarterly
    • DOI: 10.18178/IJIEE
    • Editor-in-Chief: Prof. Chandratilak De Silva Liyanage
    • Executive Editor: Jennifer Zeng
    • Abstracting/ Indexing : Google Scholar, Electronic Journals Library, Crossref and ProQuest, Ei (INSPEC, IET), EBSCO.
    • E-mail ijiee@ejournal.net

University of Brunei Darussalam, Brunei Darussalam   
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IJIEE 2016 Vol.6(1): 63-66 ISSN: 2010-3719
DOI: 10.18178/ijiee.2016.6.1.596

Design of SPARC V8 ISS Based on SystemC

Xue Yang, Yunkai Feng, and Lixin Yu
Abstract—Nowadays System on Chip (SoC) coming into use everywhere, SoC simulators are developing rapidly. Instruction Set Simulator (ISS) is one of the most popularly used tools for SoC exploitation. SoC designers can use it to test and verify their new designed processors, design and verify compilers, assistant debugging systems, and evaluate operating systems. A SPARC V8 ISS model base on SystemC is established in this paper, and it has been used to exploit application program, replant BenchMark and test and verify Golden Model. Test results proved the validity of the model function. In addition, the model has flexible structure with variety functions and strong practicability, so it can make great effect when design processors.

Index Terms—ISS, SPARC, function model, SystemC.

Xue Yang , Yunkai Feng, and Lixin Yu are with Beijing Microelectronics Technology Institute, Beijing, China (e-mail: 15911106595@163.com).


Cite: Xue Yang, Yunkai Feng, and Lixin Yu, "Design of SPARC V8 ISS Based on SystemC," International Journal of Information and Electronics Engineering vol. 6, no. 1, pp. 63-66, 2016.

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