Abstract—In this paper, we present an efficient model for on- chip interconnects delay analysis. Several approaches have already been proposed for approximating the interconnect delay accurately and efficiently. Moments of the impulse response are widely used for interconnect delay analysis, from the explicit Elmore delay (the first moment of the impulse response) expression to the moment matching methods which create reduced order trans-impedance and transfer function approximations. However, the Elmore delay is fast becoming ineffective for deep submicron technologies and reduced order transfer function delays are impractical for use as early-phase design metrics or as design optimization cost functions. This paper describes an accurate approach for fitting moments of the impulse response to probability density functions so that delay can be estimated accurately at an early physical design stage. For RC trees, it is demonstrated that inverse gamma functions provide a probably stable approximation. The accuracy of the proposed model is justified with the results obtained from that of SPICE simulations.
Index Terms—Delay Calculation, inverse gamma distribution, moment matching, on-chip interconnect; probability distribution function.
Vikas Maheshwari is with the ECE Department, Anand Engineering College, Agra, U.P., India (e-mail: firstname.lastname@example.org).
Sumita Gupta is with the ECE Department, H. I. T. M. Agra, (formally known as BMAS Engineering College), Agra, U.P., India (e-mail:email@example.com).
V. Satyanarayana is with LG Electronics India Pvt. Ltd, Greater Noida, U. P., India (e-mail: firstname.lastname@example.org).
R. Kar, D. Mandal, and A. K. Bhattacharjee are with the Department of ECE, National Institute of Technology, Durgapur-9, West Bengal, India (e-mail: email@example.com).
Cite: V. Maheshwari, Sumita Gupta, V. Satyanarayan, R. Kar, D. Mandal, and A. K. Bhattacharjee, "Delay Estimation for Global RC Interconnect Using Inverse Gamma Distribution Function," International Journal of Information and Electronics Engineering vol. 2, no. 2, pp. 259-263, 2012.