Abstract—We propose a novel two-layer lithography method to fabricate sub-100nm slot using complementary-symmetry metal–oxide–semiconductor (CMOS) compatible processes. The slot waveguide is originally patterned using deep-UV photolithography (248nm) that has a resolution limit of 200 nm. A sacrificial etching technique is then employed to facilitate the nanoscale slot fabrication by film deposition and etching back. Sub-100 nm slot dimensions are successfully achieved in fabrication. The waveguides in the rest of devices are then patterned and obtained as per normal. By separating the lithography process into two-steps (one for slot and one for waveguide), we are able to fabricate 60nm slot with a high yield and throughput without interfering the device design. The presented technique is very useful for wide applications of slot waveguide, especially non-linear optics and modulator.
Index Terms—Optical device, slot waveguide, CMOS-compatible fabrication, silicon photonics.
The authors are with Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685. Corresponding author is Dr. Huijuan Zhang (email: email@example.com).
J. Song is also with State Key Laboratory on Integrated opto-electronics, College of Electronic Science and Engineering, Jilin University, Changchun, People’s Republic of China, 130023.
Cite: Huijuan Zhang, Shiyi Chen, Junfeng Song, Haifeng Zhou, Chao Li, Ming Bin Yu, and Guo-Qiang Lo, "Photolithographically Fabricated Sub-100 nm Silicon Slot Waveguide," International Journal of Information and Electronics Engineering vol. 2, no. 6, pp. 859-861, 2012.