Design of a Modified Gabor Filter with Vedic Multipliers Using Verilog HDL
Keywords:
Gabor filter, MAC, vedic multipliers, verilog HDL, Xilinx.Abstract
Gabor Filters are widely used in all kinds of image
processing. Gabor Filters include a memory, a controller and an arithmetic logic unit. The Gabor Filter designed in this project has a RAM type Memory, but a few changes were made in the Controller and the Arithmetic Logic Unit (ALU). The Arithmetic Logic Unit had a new type of multiplier called a Vedic Multiplier. So building a Gabor Filter with Vedic Multipliers is something that we have introduced in this paper. Using Vedic Multipliers, our filter was made faster without affecting the functionality of filter. The project included two
phases where we did simulation of the Verilog Codes and synthesis of the whole Gabor Filter. For simulation and coding modules with Verilog HDL, we used ModelSim-Altera 6.5b (Quartus II 9.1) Starter Edition. For synthesis of the units and examining RTL schematic diagrams, we used Xilinx ISE 9.2i.
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